<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE article PUBLIC "-//NLM//DTD JATS (Z39.96) Journal Publishing DTD v1.3 20210610//EN" "JATS-journalpublishing1-3.dtd">
<article article-type="research-article" dtd-version="1.3" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xml:lang="ru"><front><journal-meta><journal-id journal-id-type="publisher-id">trudyniisi</journal-id><journal-title-group><journal-title xml:lang="ru">Труды НИИСИ</journal-title><trans-title-group xml:lang="en"><trans-title>SRISA Proceedings</trans-title></trans-title-group></journal-title-group><issn pub-type="ppub">2225-7349</issn><issn pub-type="epub">3033-6422</issn><publisher><publisher-name>НИЦ «КУРЧАТОВСКИЙ ИНСТИТУТ» - НИИСИ</publisher-name></publisher></journal-meta><article-meta><article-id custom-type="elpub" pub-id-type="custom">trudyniisi-65</article-id><article-categories><subj-group subj-group-type="heading"><subject>Research Article</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="ru"><subject>ПРОЕКТИРОВАНИЕ И МОДЕЛИРОВАНИЕ СБИС</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="en"><subject>DESIGN AND MODELING OF VLSI</subject></subj-group></article-categories><title-group><article-title>Применимость методов машинного обучения для тестирования моделей микропроцессора</article-title><trans-title-group xml:lang="en"><trans-title>A Survey of the Machine Learning Methods Applicability for Microprocessor Models Verification</trans-title></trans-title-group></title-group><contrib-group><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Гревцев</surname><given-names>Н. А.</given-names></name><name name-style="western" xml:lang="en"><surname>Grevtsev</surname><given-names>N. A.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Москва</p></bio><email xlink:type="simple">ngrevcev@cs.niisi.ras.ru</email><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Манеркин</surname><given-names>А. Д.</given-names></name><name name-style="western" xml:lang="en"><surname>Manerkin</surname><given-names>A. D.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Москва</p></bio><email xlink:type="simple">manerkin@cs.niisi.ras.ru</email><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Чибисов</surname><given-names>П. А.</given-names></name><name name-style="western" xml:lang="en"><surname>Chibisov</surname><given-names>P. A.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Москва</p></bio><email xlink:type="simple">chibisov@cs.niisi.ras.ru</email><xref ref-type="aff" rid="aff-1"/></contrib></contrib-group><aff-alternatives id="aff-1"><aff xml:lang="ru">ФГУ ФНЦ НИИСИ РАН<country>Россия</country></aff></aff-alternatives><pub-date pub-type="collection"><year>2023</year></pub-date><pub-date pub-type="epub"><day>21</day><month>10</month><year>2025</year></pub-date><volume>13</volume><issue>4</issue><fpage>97</fpage><lpage>104</lpage><permissions><copyright-statement>Copyright &amp;#x00A9; Гревцев Н.А., Манеркин А.Д., Чибисов П.А., 2025</copyright-statement><copyright-year>2025</copyright-year><copyright-holder xml:lang="ru">Гревцев Н.А., Манеркин А.Д., Чибисов П.А.</copyright-holder><copyright-holder xml:lang="en">Grevtsev N.A., Manerkin A.D., Chibisov P.A.</copyright-holder><license license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>This work is licensed under a Creative Commons Attribution 4.0 License.</license-p></license></permissions><self-uri xlink:href="https://www.t-niisi.ru/jour/article/view/65">https://www.t-niisi.ru/jour/article/view/65</self-uri><abstract><p>В статье приведен обзор использования методов машинного обучения для различных направлений функциональной верификации. Рассматривается использование машинного обучения в «presilicon» верификации, а именно в имитационном тестировании и верификации при помощи UVM. Приводится обзор в области «post-silicon» верификации. Делается вывод об основных областях применения машинного обучения, а также о возможных будущих направлениях исследований.</p></abstract><trans-abstract xml:lang="en"><p>The article provides an overview about the using machine learning methods in various areas of functional verification. We consider the use of machine learning in "pre-silicon" verification, precisely in simulation-based verification and Universal Verification Methodology. Then we discuss the field of "post-silicon" verification. The main decision was made in conclusion about the main areas of machine learning applications, as well as possible future directions of research.</p></trans-abstract><kwd-group xml:lang="ru"><kwd>верификация микропроцессоров</kwd><kwd>машинное обучение</kwd><kwd>Deep Learning</kwd><kwd>UVM</kwd></kwd-group><kwd-group xml:lang="en"><kwd>microprocessor verification</kwd><kwd>machine learning</kwd><kwd>Deep Learning</kwd><kwd>UVM</kwd></kwd-group><funding-group xml:lang="ru"><funding-statement>Публикация выполнена в рамках государственного задания ФГУ ФНЦ НИИСИ РАН по теме № FNEF-2022-0004.</funding-statement></funding-group></article-meta></front><back><ref-list><title>References</title><ref id="cit1"><label>1</label><citation-alternatives><mixed-citation xml:lang="ru">Камкин, А. С. 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