Preview

SRISA Proceedings

Advanced search

Graph neural networks and their application in the design of digital VLSI

Abstract

The article discusses the method of machine learning on graphs, presents the architecture of modern graph neural networks, as well as their application for solving digital VLSI design problems, especially in placing standard cells at the layout design stage. The solution of this problem using machine learning methods is an urgent problem, since the standard placement algorithms used in modern CAD systems face difficulties when working with digital circuits, the number of logic elements in which reaches 106 and more. This leads to a long operating time and non-optimality of the results obtained in terms of the occupied area and power consumption of the designed VLSI.

About the Authors

N. V. Zheludkov
ФГУ ФНЦ НИИСИ РАН
Russian Federation


K. A. Petrov
ФГУ ФНЦ НИИСИ РАН
Russian Federation


References

1. W.L. Hamilton, R. Ying, J. Leskove. Representation Learning on Graphs: Methods and Applications. «Bulletin of the IEEE Computer Society Technical Committee on Data Engineering», Vol. 40 (2017), №3, 52-74.

2. M.M. Bronstein, J. Bruna, Y, LeCun, A.Szlam. Geometric Deep Learning: Going beyond Euclidean data. “IEEE Signal Processing Magazine”, Vol. 34 (2017), №6, 18-42.

3. T.N. Kipf, M. Welling. Semi-supervised Classification with Graph Convolutional Networks. “5th International Conference on Learning Representations 2017”, France, Toulon, ICLR, 2017, 66-80.

4. W.L. Hamilton. Graph Representation Learning. Synthesis Lectures on Artificial Intelligence and Machine Learning, Vol. 14 (2019), №3, 1-159.

5. G. Huang, J. Hu, Y. He. Machine Learning for Electronic Design Automation: A Survey. “ACM Transactions on Design Automation of Electronic Systems”, Vol. 26 (2021), №5, 1-46.

6. Y. Zhang, M. Ren, B. Khailany. GRANNITE: Graph neural Network Interference for Transferable Power Estimation. “Design Automation Conference (DAC) 2020”, USA, San Francisco, IEEE, 2020.

7. V. Zhang, M. Ren, B. Keller, B. Khailany. MAVIREC: ML-Aided Vectored IR-Drop Estimation and Classification. “Design, Automation & Test in Europe Conference & Exhibition, 2021”, France, Grenoble, 2021, IEEE, 2021.

8. M. Ren, G. Kokai, W. Turner, T. Ku. ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Networks, “Design Automation Conference (DAC) 2020”. USA, San Francisco, IEEE, 2020.

9. R. Kirby, S. Godil, R. Roy, B. Catanzaro. CongestionNet: Routing Congestion Prediction Using Deep Graph Neural Networks. “IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC) 2019”, Peru, Cuzco, IEEE, 2019.

10. Y. Lu, S. Pentapati, S.K. Lim. VLSI Placement Optimization using Graph Neural Networks. “IEEE/ACM International Conference On Computer Aided Design (ICCAD)”, USA, San Diego, 2020.


Review

For citations:


Zheludkov N.V., Petrov K.A. Graph neural networks and their application in the design of digital VLSI. МАТЕМАТИЧЕСКОЕ И КОМПЬЮТЕРНОЕ МОДЕЛИРОВАНИЕ СЛОЖНЫХ СИСТЕМ: ТЕОРЕТИЧЕСКИЕ И ПРИКЛАДНЫЕ АСПЕКТЫ. 2022;12(4):61-67. (In Russ.)

Views: 34


Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.


ISSN 2225-7349 (Print)
ISSN 3033-6422 (Online)