12-bit analog-to-digital converter of conveyor type
https://doi.org/10.25682/NIISI.2025.1.0003
Abstract
A CMOS 12-bit analog-to-digital converter of conveyor type with design standards of 28 nm is presented. Comparatively low power consumption with a sufficiently high sampling frequency of up to 125 MHz is achieved through the use of fully differential two-stage operational amplifiers in the pipeline architecture, operating in a 1.5-bit ADC pipeline architecture per stage with a supply voltage of 1.8V.
References
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Review
For citations:
Rogatkin Y.B. 12-bit analog-to-digital converter of conveyor type. SRISA Proceedings. 2025;15(1):21-25. (In Russ.) https://doi.org/10.25682/NIISI.2025.1.0003