Power Consumption of VLSI IP-Blocks by Means of Automated Selection of Optimal Design Parameters
Abstract
The possibility of using the method of automated selection of optimal parameters in the process of designing IP-blocks to optimize their energy consumption is investigated. The I/O interface unit of the processor and coprocessor communication and the unit of integer multiplication-division of 64-bit numbers were used as objects of research. The results obtained allow us to conclude that it is expedient to use the investigated method in the design route of IP blocks.
About the Authors
E. S. Kocheva
ФГУ ФНЦ НИИСИ РАН
Russian Federation
Russian Federation
N. V. Zheludkov
ФГУ ФНЦ НИИСИ РАН
Russian Federation
Russian Federation
E. V. Tkachenko
ФГУ ФНЦ НИИСИ РАН
Russian Federation
Russian Federation
B. E. Evlampiev
ФГУ ФНЦ НИИСИ РАН
Russian Federation
Russian Federation
K. A. Chumakov
ФГУ ФНЦ НИИСИ РАН
Russian Federation
Russian Federation
K. A. Petrov
ФГУ ФНЦ НИИСИ РАН
Russian Federation
Russian Federation
References
1. Jinwook Jung., Andrew B. Kahng. METRICS2.1 and Flow Tuning in the IEEE CEDA Robust Design Flow and OpenROAD // 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2021.
2. Takuya Akiba, Shotaro Sano, Toshihiko Yanase, Takeru Ohta, Masanori Koyama. Optuna: A Next- generation Hyperparameter Optimization Framework // The 25th ACM SIGKDD International Conference, 2019. C. 2623-2631.
Review
For citations:
Kocheva E.S., Zheludkov N.V., Tkachenko E.V., Evlampiev B.E., Chumakov K.A., Petrov K.A. Power Consumption of VLSI IP-Blocks by Means of Automated Selection of Optimal Design Parameters. SRISA Proceedings. 2023;13(4):80-84. (In Russ.)
Views:
13
Email this article 