For citations:
Kocheva E.S., Zheludkov N.V., Tkachenko E.V., Evlampiev B.E., Petrov K.A. Reduction of Time Consumption on VLSI IP-blocks Designing Using Input Parameter Selection Automation. SRISA Proceedings. 2024;14(4):28-32. (In Russ.)
Kocheva E.S., Zheludkov N.V., Tkachenko E.V., Evlampiev B.E., Petrov K.A. Reduction of Time Consumption on VLSI IP-blocks Designing Using Input Parameter Selection Automation. SRISA Proceedings. 2024;14(4):28-32. (In Russ.)