Data Acquisition Module for an External SPI ADC with DMA Support

An IP block has been developed that provides the reception of streaming data from an external analog-to-digital converter (ADC) over the SPI interface. A distinctive feature of this block is that the ADC acts as the master, generating the clock signal and controlling data exchange on the SPI bus. Interfacing with an ADC of this type requires implementing the SPI controller in slave mode. The proposed IP block consists of an SPI slave controller, a configuration register block, and a direct memory access (DMA) module. The use of DMA minimizes the involvement of the central processor: the sequence of data received from the ADC is accumulated in an internal buffer, after which it is transferred as a burst to a specified address in system memory without software intervention. The block supports operation with ADCs of 10, 12, 14, and 16 bits in resolution; single and circular DMA modes are also implemented, along with an interrupt system triggered by buffer-fill events.

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