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12-bit analog-to-digital converter of conveyor type

https://doi.org/10.25682/NIISI.2025.1.0003

Abstract

A CMOS 12-bit analog-to-digital converter of conveyor type with design standards of 28 nm is presented. Comparatively low power consumption with a sufficiently high sampling frequency of up to 125 MHz is achieved through the use of fully differential two-stage operational amplifiers in the pipeline architecture, operating in a 1.5-bit ADC pipeline architecture per stage with a supply voltage of 1.8V.

About the Author

Y. B. Rogatkin
НИЦ «Курчатовский институт» — НИИСИ
Russian Federation


References

1. Улучшение оцифровки с помощью передискретизации и усреднения, https://microsin.net/programming/dsp/an118-improving-adc-resolution-by-oversampling-and-veraging.html (дата обращения 15.08.2025).

2. Sivaram Prasad Kopparthy,Ishit Makwana, Anu Gupta."Asynchronous 8-bit pipelined ADC for self triggered sensor based applications", Asia Pacific Conferenceon Postgraduate Research in Microelectronics and Electronics, 2012.

3. S. Lewis et al., “A 10-b 20 MSamples/s analog to digital converter,”IEEE J. Solid-State Circuits, vol. 27, pp. 351–358, Mar. 1992.

4. Ю.Б.Рогаткин. Двухкаскадный операционный усилитель для аналого-цифрового преобразователя конвейерного типа. «Нано- и микросистемная техника», 2025, №4, с.201-208.

5. https://habr.com/ru/companies/milandr/articles/528164 (дата обращения 15.08.2025).


Review

For citations:


Rogatkin Y.B. 12-bit analog-to-digital converter of conveyor type. SRISA Proceedings. 2025;15(1):21-25. (In Russ.) https://doi.org/10.25682/NIISI.2025.1.0003

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ISSN 2225-7349 (Print)