Simulation of Carrier Mobility in Silicon Gate-All-Around (GAA) Nanotransistors
https://doi.org/10.25682/NIISI.2026.1.0006
Аннотация
We studied the impact of scattering mechanisms on carrier mobility in the active region of ultrathin silicon gate-all-around (GAA) cylindrical nanotransistors. Using numerical simulation tools and carrier scattering models, we analyzed how these mechanisms affect carrier mobility. We applied statistical methods to estimate mobility variation across 3 to 8 nm channel diameters and 200 to 400 K temperatures.
Об авторе
N. V. Masalsky
Scientific Research Institute for System Analysis of the National Research Centre Kurchatov Institute, Moscow
Россия
Россия
Список литературы
1. International Technology Roadmap for Semiconductors (ITRS) Interconnect, 2020 Edition. [Online] Available: https://irds.ieee.org/editions/2020 (accessed on 25 November 2025).
2. D.K. Ferry, M.J. Gilbert, R. Akis. Some considerations on nanowires in nanoelectronics // “IEEE Trans. Electron Devices”, (2008), V. 55, 2820–2826.
3. J. Appenzeller, J. Knoch, M.T. Bjork, H. Riel, H. Schmid, W. Riess. Toward nanowire electronics // “IEEE Trans. Electron Device”, (2008), V. 55, 2827–2845.
4. B. Yu, L. Wang, Y. Yuan, P.M. Asbeck, Y. Taur. Scaling of nanowire transistors // “IEEE Trans. Electron Device”, (2008), V. 55, 2846–2858.
5. W. Lu, P. Xie, C.M. Lieber. Nanowire transistor performance limits and applications // “IEEE Trans. Electron Device”, (2008), V. 55, 2859–2876.
6. I.M. Tienda-Luna, F.G. Ruiz, A. Godoy, B. Biel, F. Gamiz. Surface roughness scattering model for arbitrarily oriented silicon nanowires // “J. Appl. Phys.”, (2011), V. 110, 084514.
7. S. Jin, M.V. Fischetti, T.-W. Tang. Modeling of electron mobility in gated silicon nanowires at room temperature: Surface roughness scattering, dielectric screening, and band nonparabolicity // “J. Appl. Phys.”, (2007), V. 102, 083715.
8. T. Sadi, E. Towie, M. Nedjalkov, C. Riddet, C. Alexander, L. Wang, V. Georgiev, A. Brown, C. Millar, A. Asenov. One-dimensional multi-subband Monte Carlo simulation of charge transport in Si nanowire transistors// “In Proceedings of the Simulation of Semiconductor Processes and Devices”, (2016), Nuremberg, Germany, 5 October 2016, 23–26.
9. W. Zhang, C. Delerue, Y.-M. Niquet, G. Allan, E. Wang. Atomistic modeling of electron-phonon coupling and transport properties in n-type [110] silicon nanowires // “Phys. Rev. B”, (2010), V. 82, 115319.
10. Y.-M. Niquet, C. Delerue, D. Rideau, B. Videau. Fully atomistic simulations of phonon-limited mobility of electrons and holes in 〈001〉-, 〈110〉-, and 〈111〉-oriented Si nanowires // “IEEE Trans. Electron Device”, (2012), V. 59, 1480–1487.
11. Y.-M. Niquet, C. Delerue, C. Krzeminski. Effects of strain on the carrier mobility in silicon nanowires // “Nano Lett.”, (2012), V. 12, 3545–3550.
12. N.V. Masalsky. Effects of the Physical Parameters on The I-V Data of Cylindrical Surrounding Gate SOI CMOS Nanotransistor // Microelectronics, (2021), Vol. 60, No. 6, 387-393 (in Russ.)
13. K. Huang. Statistical mechanics. New York, U.S.A.: John Wiley & Sons, 1987.
14. M. Kubo, N. Toda, N. Hashitsume. Statistical Physics II: Nonequilibrium Statistical Mechanics. Berlin, Germany: Springer, 1991.
15. A. Asenov. Random dopant induced threshold voltage lowering and fluctuations in sub-0.1 μm MOSFETs: A 3-D atomistic simulation study // “IEEE Trans. Electron Device”, (1998), V. 45, 2505–2513.
Рецензия
Для цитирования:
Masalsky N.V. Simulation of Carrier Mobility in Silicon Gate-All-Around (GAA) Nanotransistors. Труды НИИСИ. 2026;16(1):37-41. https://doi.org/10.25682/NIISI.2026.1.0006
For citation:
Masalsky N.V. Simulation of Carrier Mobility in Silicon Gate-All-Around (GAA) Nanotransistors. SRISA Proceedings. 2026;16(1):37-41. https://doi.org/10.25682/NIISI.2026.1.0006
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