The Influence of the Drain Size of the Metal Gate of Silicon Conical GAA Nanotransistors on the Fluctuations of the Threshold Voltage
Abstract
The influence of the grain size of a metal gate on the fluctuation of the threshold voltage of a silicon field GAA nanotransistor is discussed. Based on Pelgor's theorem, a method of reliable estimation of threshold voltage fluctuations has been developed. Pelgorm coefficients were obtained in the range of transistor gate lengths from 11 to 25 nm and average grain sizes from 3 to 10 nm. The relative errors between the model values of the standard deviation of the threshold voltage and the data obtained from 3D modeling are in almost 95% of cases below 5%.
References
1. More Moore. International Roadmap for Devices and Systems. IRDS, Piscataway, NJ, USA, 2021
2. S. Yu, S. M. Won, H. W. Baac, D. Son, C. Shin. Quantitative evaluation of line-edge roughness in various FinFET structures: Bayesian neural network with automatic model selection. “IEEE Access”, vol. 10 (2022), 26340–26346
3. M. A. Elmessary. Scaling/LER study of Si GAA nanowire FET using 3D finite element Monte Carlo simulations. “Solid-State Electron”, vol. 128, (2017), 17–24.
4. K. Nayak, S. Agarwal, M. Bajaj, P. J. Oldiges, K. V. R. M. Murali, V. R. Rao. Metal-gate granularity-induced threshold voltage variability and mismatch in Si gate-all-around nanowire n-MOSFETs. “IEEE Trans. Electron Devices”, vol. 61, (2014), no. 11, 3892–3895.
5. W.-L. Sung, Y.-S. Yang, Y. Li. Work-function fluctuation of gate-all-around silicon nanowire n-MOSFETs: A unified comparison between cuboid and Voronoi methods. “IEEE J. Electron Devices Soc.”, (2021), vol. 9, 151–159.
6. J. A. Croon, W. Sansen, H.E. Maes. Matching properties of deep sub-micron MOS transistors, Springer, 2005.
7. N.V. Masalskii. Simulation of silicon FETs with a fully enclosed gate with a high-k gate dielectric. “Russian Microelectronics’. (2023), V. 52, 228-232.
8. C. Akbar, Y. Li, W. L. Sung. Machine learning aided device simulation of work function fluctuation for multichannel gate-all-around silicon nanosheet MOSFETs. “IEEE Trans. Electron Devices”, (2021), vol. 68, no. 11, 5490–5497.
9. J. Lim, C. Shin. Machine learning (ML)-based model to characterize the line edge roughness (LER)-induced random variation in FinFET. “IEEE Access”, (2020), vol. 8, 158237–158242.
10. G. Indalecio, N. Seoane, K. Kalna, A. J. García-Loureiro. Fluctuation sensitivity map: A novel technique to characterise and predict device behaviour under metal grain work-function variability effects. “IEEE Trans. Electron Devices”, (2017), vol. 64, no. 4, 1695–1701.
11. H. Carrillo-Nuñez, N. Dimitrova, A. Asenov, V. Georgiev. Machine learning approach for predicting the effect of statistical variability in Si junctionless nanowire transistors. “IEEE Electron Device Lett.”, (2019), vol. 40, no. 9, 1366–1369.
12. M.J. Pelgrom. Matching properties of MOS transistors. “IEEE J. of solid-state circuits”, V. 24, (1989), 1433-1439.
13. S. A. Vitale, J. Kedzierski, P. Healey, P. W. Wyatt, C. L. Keast. Work-function-tuned TiN metal gate FDSOI transistors for subthreshold operation. “IEEE Trans. Electron Devices”, (2011), vol. 58, no. 2, 419–426.
14. K. Takeuchi, M.-S. Ibaraki, A. Nishida. Random fluctuations in scaled MOS devices. International Conference on Simulation of Semiconductor Processes and Devices SISPAD’09, SISPAD 2009, 79-85.
15. D. Nagy, G. Espiñeira, G. Indalecio, A. J. García-Loureiro, K. Kalna, N. Seoane. Benchmarking of FinFET, nanosheet, and nanowire FET architectures for future technology nodes. “IEEE Access”, (2020), vol. 8, 53196–53202.
16. Н.В. Масальский. Чувствительность распределения потенциала конических GAA нанотронзисторов к вариациям топологических размеров рабочей области, “Труды НИИСИ РАН”, 2023, Т. 13(3), 23-29.
17. J.P Colinge. FinFETs and Other Multi-Gate Transistor. NewYork: Springer-Verlag, 2008.
18. Н. В. Масальский. Проблемы моделирования 3D затворных полевых нанотранзисторов архитектура с полностью охватывающим затвором.”Нанотехнологии”. (2019), Т. 11, № 3, 14-24
19. J.S. Yoon, T. Rim, J. Kim, K. Kim, C.K. Baek, Y.H. Jeong. Statistical variability study of random dopant fluctuation on gate-all-around inversion-mode silicon nanowire field-effect transistors. “Appl. Phys. Lett.”, V. 106, (2015), 1035073.
Review
For citations:
Masalsky N. The Influence of the Drain Size of the Metal Gate of Silicon Conical GAA Nanotransistors on the Fluctuations of the Threshold Voltage. SRISA Proceedings. 2023;13(4):111-116. (In Russ.)
Views:
25
Email this article 