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| Issue |
Title |
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| Vol 13, No 4 (2023) |
Fault Tolerance Evaluation of IP-Block Topology at Different Stages of Combinational Logic Synthesis |
Abstract
PDF (Rus)
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E. K. Emin, K. A. Petrov, V. V. Azarov, A. P. Skorobogatov, A. A. Antonov |
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| Vol 13, No 4 (2023) |
Power Consumption of VLSI IP-Blocks by Means of Automated Selection of Optimal Design Parameters |
Abstract
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E. S. Kocheva, N. V. Zheludkov, E. V. Tkachenko, B. E. Evlampiev, K. A. Chumakov, K. A. Petrov |
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| Vol 13, No 4 (2023) |
Implementation of Spatial Image Filtering Function on a Vector Coprocessor |
Abstract
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S. I. Aryashev, P. A. Chibisov, V. V. Tsvetkov, D. A. Trubitsyn, K. A. Petrov |
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| Vol 13, No 4 (2023) |
Estimation of Congestion Map in the VLSI Design of Digital Blocks with Graph Neural Network |
Abstract
PDF (Rus)
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N. V. Zheludkov, I. M. Karandashev, E. S. Kocheva, M. K. Saibodalov, Z. B. Sokhova, A. A. Umnova |
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| Vol 13, No 4 (2023) |
A Survey of the Machine Learning Methods Applicability for Microprocessor Models Verification |
Abstract
PDF (Rus)
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N. A. Grevtsev, A. D. Manerkin, P. A. Chibisov |
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| Vol 13, No 4 (2023) |
Miss Probability Estimates for Random Testing of the Cache |
Abstract
PDF (Rus)
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A. S. Koutsaev |
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| Vol 13, No 4 (2023) |
The Influence of the Drain Size of the Metal Gate of Silicon Conical GAA Nanotransistors on the Fluctuations of the Threshold Voltage |
Abstract
PDF (Rus)
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N. Masalsky |
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| Vol 13, No 3 (2023) |
Sensitivity of the Potential Distribution of Conical GAA Nanotransistors to Variations in the Topological Dimensions of the Working Area |
Abstract
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N. Masalsky |
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| Vol 13, No 3 (2023) |
Experience of the SRISA RAS in the Development of Substrates for Flip-Chip Technology |
Abstract
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A. M. Baranov, A. A. Podkovyrov, A. V. Andreev |
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| Vol 13, No 3 (2023) |
Stationary States of the Resistor Array |
Abstract
PDF (Rus)
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V. B. Kotov, G. A. Beskhlebnova |
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| Vol 12, No 4 (2022) |
Using Fault Injection Technique in SoC Design Flow to Evaluate Shifting to a Smaller Technology Node |
Abstract
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P. Chernyakov, A. Skorobogatov |
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| Vol 12, No 4 (2022) |
Graph neural networks and their application in the design of digital VLSI |
Abstract
PDF (Rus)
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N. V. Zheludkov, K. A. Petrov |
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| Vol 12, No 4 (2022) |
Using the Cosimulation Method in High-Performance Microprocessors Development |
Abstract
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A. G. Vorsin, A. V. Shumakov, K. A. Petrov, P. S. Zubkovskiy |
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| Vol 12, No 4 (2022) |
Application of Various Neural Networks Architectures for Mask Calculation in Problem of Inverse Photolithography |
Abstract
PDF (Rus)
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Ya. M. Karandashev, G. S. Teplov, V. V. Keremet, A. A. Karmanov, A. V. Kuzovkov, M. Yu. Malsagov |
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